IBM Unveils 0.7-Nanometer Nanostack 3D Chip Architecture

IBM was the first to demonstrate a chip built on a 2-nanometer node in 2021 and is now pushing into sub-nanometer processes. As generative AI and high-performance computing drive demand for greater computing power, memory bandwidth and energy efficiency, Nanostack replaces continued planar scaling with 3D stacking, offering an important path for sustaining growth in chip density.

IBM unveiled the world's first 0.7-nanometer, or 7-angstrom, node technology on June 25, 2026. Nanostack can double transistor density compared with IBM's 2-nanometer generation, reduce SRAM area by 40%, improve performance by up to 50% and boost energy efficiency by 70%. IBM estimates that its partners could introduce the technology into mass production within five years at the earliest. It did not disclose the amount invested.