Powertech, Broadcom to Build Singapore Plant for Advanced AI Chip Packaging

As the generative AI boom continues, demand for advanced packaging of high-performance computing chips is rising sharply. Fan-out panel-level packaging (FOPLP), which offers a larger packaging area at lower cost, is seen as a key technology for overcoming the physical limits of semiconductors and reducing manufacturing costs. If Taiwan packaging and testing giant Powertech Technology can establish an edge in the technology, it could ease existing supply-chain bottlenecks and move directly into the core custom-chip manufacturing operations of leading global technology companies.

Taiwanese memory-chip packaging and testing giant Powertech Technology announced in mid-July 2026 that it would partner with U.S. chipmaker Broadcom to jointly invest $400 million in a new packaging and testing plant in Singapore. The facility will focus on next-generation FOPLP technology and seek advanced back-end packaging orders for high-end chips, including AI accelerators, from major global technology companies. The project is expected to provide strong growth momentum for Powertech’s global expansion and shift into non-memory businesses.