Intel Malaysia Reportedly Takes On TSMC CoWoS Backend Work

TSMC’s chip-on-wafer-on-substrate, or CoWoS, technology is a critical packaging platform for combining AI accelerators with high-bandwidth memory. Capacity has remained tight as demand for generative-AI computing expands. Intel’s involvement would show how competing semiconductor manufacturers can still cooperate at the packaging stage, using underutilized or specialized facilities to ease bottlenecks across the AI chip supply chain.

Intel’s Malaysia operations are reportedly handling part of the backend packaging work associated with TSMC’s CoWoS orders. A marked decline in Taiwan’s HBM import value, alongside a sharp increase in Malaysia’s, has been cited as evidence that some processing is shifting there. Neither Intel nor TSMC has confirmed the arrangement, and the companies have not disclosed its start date, order value or capacity commitment.