NVIDIA Pushes Into Scale-Up CPO as TSMC Targets 10,000 PIC Chips a Month in 2027

Co-packaged optics, or CPO, integrates optical engines with computing chips to reduce power consumption and latency in high-speed data transmission. NVIDIA is introducing CPO into its GPU scale-up interconnect architecture, driving AI data centers to shift from copper wiring to optical interconnects. TSMC’s photonic integrated circuit, or PIC, capacity has consequently become critical to supply-chain expansion.

Morgan Stanley expects NVIDIA’s optical-engine shipments to grow significantly in 2026, with CPO penetration in AI data centers rising each year. To meet demand for AI computing power, TSMC plans to increase monthly PIC chip capacity to 10,000 units in the first quarter of 2027, accelerating its expansion into scale-up optical interconnects.