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TSMC Targets CPO Mass Production as Supply Bottlenecks Shift to Lasers and Fiber

1 reports · First detected 2026-08-31 · Last active 2026-08-31

Surging artificial intelligence workloads are straining the bandwidth and power efficiency of conventional electrical links between chips. Silicon photonics and co-packaged optics, or CPO, place optical components closer to processors, reducing transmission distances and energy use. The technology is increasingly viewed as a critical interconnect architecture for next-generation AI data centers as computing capacity expands.

TSMC Vice President Hsu Kuo-chin said silicon photonics and CPO are expected to enter mass production in the second half of 2026 and become a mainstream architecture before 2027, pushing back against doubts over large-scale manufacturing. Taiwan’s foundry sector can already produce optical engines, he said, while lasers, optical fiber, connectors and product testing remain the main supply-chain constraints.

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SemiAnalysis Says CPO Yield and Cost Challenges Will Delay Large-Scale Production2026-06-10 · 2 reports · similarity 0.80

Co-packaged optics (CPO) integrates optical engines and switch ASICs in the same package, reducing power consumption and latency in high-speed interconnects for AI data centers. It is therefore seen as critical to the expansion of AI infrastructure by NVIDIA and other companies. Whether mass production begins on schedule will directly affect revenue expectations across the optical-module, silicon-photonics and advanced-packaging supply chains.

A SemiAnalysis report dated June 9, 2026, said that even if the connection yield for a single optical engine reaches 95%, integrating 32 engines with each ASIC would leave the overall system yield at only about 19%. It estimated that large-scale CPO production would be delayed until 2028–2029. AAOI plunged 17.17% that day to close at $162.88, while Coherent fell 11.44%. Morgan Stanley reiterated on June 11 that the long-term trend remained intact.

NVIDIA Pushes Into Scale-Up CPO as TSMC Targets 10,000 PIC Chips a Month in 20272026-03-11 · 2 reports · similarity 0.80

Co-packaged optics, or CPO, integrates optical engines with computing chips to reduce power consumption and latency in high-speed data transmission. NVIDIA is introducing CPO into its GPU scale-up interconnect architecture, driving AI data centers to shift from copper wiring to optical interconnects. TSMC’s photonic integrated circuit, or PIC, capacity has consequently become critical to supply-chain expansion.

Morgan Stanley expects NVIDIA’s optical-engine shipments to grow significantly in 2026, with CPO penetration in AI data centers rising each year. To meet demand for AI computing power, TSMC plans to increase monthly PIC chip capacity to 10,000 units in the first quarter of 2027, accelerating its expansion into scale-up optical interconnects.

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